Calculation of Stabilizing Resistor in High Impedance Differential Protection

Before going into the calculation part of Stabilizing Resistor, I will first explain the purpose of Stabilizing Resistor in High Impedance Differential Protection.

Stabilizing Resistor in High Impedance Differential Protection is used to prevent the operation of Relay in case of through fault. Through fault is a fault outside the zone of protection. Lets us assume that High Impedance Differential protection is used to protect a Bus bar as shown in figure.

It shall be noted here that, in High Impedance Differential Protection, all the CTs are connected in parallel and then the four wires i.e. R, Y, B and N are connected with the Relay as shown in figure above. If there is any fault in the bus, the according to Kirchhoff�s current law, the summation of current will not be zero and a net current will flow through the Relay coil to operate it. In normal condition, the summation of current will be zero and hence no current will flow through the Relay coil and hence the Relay will be stable.  Mathematically under normal condition,

I₁+ I₂ + I₃ = 0

As Relay sees only summation of current hence we normally employ an overcurrent element in High Impedance Differential Protection. This is the main difference between a high impedance and low impedance differential protection.

Let us consider a through fault i.e. fault outside the zone of protection. To be more specific, let a fault take place after the CT of any feeder. If all the CT�s maintain the same nominal ratio for all external faults the assumed scheme is perfectly valid since no current can flow in the relay coil.

However, when the instantaneous overcurrent relay is set low enough to give useful sensitivity to internal faults the Relay may in practice operate falsely on external faults due to a reduction of the nominal ratio of the fault CT resulting from fault CT core saturation. This reduction of the fault CT nominal ratio results in a �false� differential relay current that may operate the instantaneous overcurrent relay. The wort condition will be when a CT gets completely saturated. Thus we need to make Relay insensitive for through fault. To do this we use Stabilizing Resistor.

How Stabilizing Resistor makes Relay Insensitive to through Fault?

Well, the main cause for the flow of current through the Relay coil in High Impedance Differential Protection is the Voltage across the terminals of CT. We consider the worst case here when a CT gets completely saturated for through fault. When a CT gets completely saturated, it will no longer will be a source of current rather it will behave purely as a Resistor having a value equal to the CT secondary winding. Thus the fault current will not go toward the relay rather it will go circulate through the saturated CT secondary only as current always chooses a path having least resistance. Let the fault current be I_F and the resistance of CT secondary be R_CT. Therefore the voltage developed across the saturated CT will be,

V_s = I_FR_CTwhen looping of CT secondaries are done at CT Junction Box only.

Or,

V_s = I_F(R_CT+ 2R_L) when looping of CT is done at Panel or near Relay end.

Here looping of CT secondaries means parallel connection of CT secondaries. It may happen so that we are doing the paralleling at the CT Junction Box (JB) or at Panel (Relay end). If paralleling is done at Relay end then lead resistance of saturated CT up to panel shall be considered for the calculation of driving voltage across the common point of CTs but if paralleling is done at CT JB only then lead resistance of saturated CT from CT core to CT JB shall only be considered which is very less and can be ignored.

Now, let us assume that the setting of High Impedance Differential Relay for internal fault be Is. So to make Relay insensitive for through fault, the voltage developed shall not drive a current Is through the Relay, hence we put a Stabilizing Resistor R_stbin series with the Relay Coil and the value of Stabilizing Resistor R_stbis given as

R_stb= V_s / I_s

So, R_stb = I_FR_CT / I_s when paralleling is done at CT JB

Or

R_stb= V_s = I_F(R_CT + 2R_L) / I_swhen looping of CT is done at Panel or near Relay end.

Thus during through fault, for the worst condition of CT saturation, the current through the Relay coil will not be enough to cross setting value of Is and thus will not operate.

Hope you enjoyed this post. Please write your views and comments. Thank you!