Metal-Semiconductor Junction

       Metal-semiconductor junctions are very common in all semiconductor devices and have very' high importance. Depending upon the doping concentration, materials, and the characteristics o f the interface, the metal-semiconductor junctions can act as either an ohmic contact or as a Schottky barrier. An analysis of metal-semiconductor junction is presented in this section.

1. Structure of Metal-Semiconductor Junction

       A metal-semiconductor junction, as the name indicates, consists of a metal in contact with a piece of semiconductor. The structure of a typical metal-semiconductor junction is shown in Fig.1. The active junction is the interface between the metal, which acts as an anode, and the semiconductor. The other interface between the semiconductor and the metal, which acts as a cathode, is an Ohmic contact and there is no potential drop at this junction.

2. Energy Band Diagram

     The energy band diagram helps in identifying the barrier between the metal and the semiconductor. In order to understand the energy band structure at a metal-semiconductor junction, first let us consider the energy bands in metal and semiconductors separately, as shown in Fig. 2(a). The energy bands are aligned at the same vacuum level. When the metal and semiconductor are brought together, the Fermi levels do align themselves at thermal equilibrium. The condition that exists just before the thermal equilibrium is reached is depicted in Fig. 2(b).

       Let us define, Φ_B . the barrier height as the potential difference between the Fermi level of the metal and the band edge where the majority carriers exist. For an N-type semiconductor, the barrier height is given by the difference between the metal work function (Φ_M) and the electron affinity (X).

       The work function, Φ_M varies depending upon surface preparation. For P-type semiconductor, the barrier height is given by the difference between the valence band level and the Fermi level in the metal,

       where E_g is the energy gap between the conduction and valence bands. The sum of the barrier heights on N-type and P-type substrate is expected to be equal to the energy gap. E_g i.e., (Φ_BN +Φ_BP) q = E_g .

       In a metal-semiconductor junction, a barrier is formed if the Fermi level of the metal is somewhere between the valence and conduction band edges of the semiconductor, as shown in Fig. 2(b). Let us also define a built-in potential (Φ₁) as the difference between the Fermi level of the metal and the Fermi level of the semiconductor, given by,

       For an N-type semiconductor, the barrier height is given by

       For a P-type semiconductor, the Fermi level is closer to the valence band and the built-in potential is given by

       The Fermi level in an N-type semiconductor is given by

       and the Fermi level in a P-type semiconductor is given by

       Substitution Eq. (5) and Eq. (6) in Eq. (3) and Eq. (4), respectively, would give expressions for built in potentials in terms o f the barrier height and doping concentration, as follows.

3. Thermal Equilibrium

       After the metal and semiconductor have been brought into contact, electrons start to flow from the semiconductor into the metal, and as a result, a depletion region of width x_d with uncompensated donors (positive charge) is formed. Electrons continue to flow into the metal until the Fermi energy levels of metal and semiconductor align with each other. In metal, the electron current forms a negative surface charge layer. This results in an electric field and the band edges are lowered in the semiconductor (Fig. 3).

       Table 1 gives the work function (F_M) and electron affinity (X ) of some commonly used metal and semiconductors.

Example 1 A metal-semiconductor junction is made of silver and silicon with
N_D = 4 x 10¹⁷ cm^-3. Calculate the barrier height and the built-in potential.
Solution:

The work function (Φ_M) and electron affinity (X) for silver and silicon are 4.26 V and 4 .0 1 V, respectively (from Table 1). The barrier height for N-type material, from Eq. (1), is given by

The built-in potential is given by Eq. (7) i.e.,

4. Forward a n d Reverse Bias

       When an external bias is applied, the metal-to-semiconductor barrier remains unchanged, whereas, the semiconductor-to-metal barrier is either decreased (forward bias) or increased (reverse bias).

       When the metal is connected to a positive bias with respect to the semiconductor. The Fermi energy level of the metal is lowered from its equilibrium level. The depletion region is narrowed, and the potential barrier in the semiconductor is reduced. The number of electrons that diffuse from semiconductor to metal is now more than the number o f electrons that drift from metal into the semiconductor. Thus, there will be a positive current through the device. Figure 4 illustrates a metal-semiconductor junction under forward-bias condition.

       If the metal is connected to a negative bias with respect to the semiconductor, the metal is charged even more negatively than without any bias. The Fermi energy level o f the metal is raised. The electrons in the semiconductor are repelled even more. The depletion region becomes wider and the potential barrier on semiconductor side is further increased, as shown in Fig. 5. However, the barrier on the metal side remains unchanged and limits the flow o f electrons. A small current flows as a result of a few electrons in the metal acquiring enough thermal energy to overcome barrier.